Timing Report

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Design Name main
Device, Speed (SpeedFile Version) XC9572XL, -10 (3.0)
Date Created Wed Apr 08 15:38:15 2009
Created By Timing Report Generator: version K.39
Copyright Copyright (c) 1995-2008 Xilinx, Inc. All rights reserved.

Summary

Notes and Warnings
Note: This design contains no timing constraints.
Note: A default set of constraints using a delay of 0.000ns will be used for analysis.

Performance Summary
Min. Clock Period 40.800 ns.
Max. Clock Frequency (fSYSTEM) 24.510 MHz.
Limited by Cycle Time for CLK_SLOW
Clock to Setup (tCYC) 40.800 ns.
Setup to Clock at the Pad (tSU) 21.900 ns.
Clock Pad to Output Pad Delay (tCO) 25.700 ns.

Timing Constraints

Constraint Name Requirement (ns) Delay (ns) Paths Paths Failing
TS1000 0.0 0.0 0 0
AUTO_TS_F2F 0.0 40.8 165 165
AUTO_TS_P2P 0.0 25.7 11 11
AUTO_TS_P2F 0.0 23.7 33 33
AUTO_TS_F2P 0.0 23.9 130 130


Constraint: TS1000

Description: PERIOD:PERIOD_CLK_SLOW:0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)


Constraint: AUTO_TS_F2F

Description: MAXDELAY:FROM:FFS(*):TO:FFS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)
accu_in<0>.Q to accu_out<6>.D 0.000 40.800 -40.800
accu_in<0>.Q to accu_out<7>.D 0.000 40.800 -40.800
accu_in<1>.Q to accu_out<6>.D 0.000 40.800 -40.800


Constraint: AUTO_TS_P2P

Description: MAXDELAY:FROM:PADS(*):TO:PADS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)
CLK_SLOW to A 0.000 25.700 -25.700
CLK_SLOW to B 0.000 25.700 -25.700
CLK_SLOW to C 0.000 25.700 -25.700


Constraint: AUTO_TS_P2F

Description: MAXDELAY:FROM:PADS(*):TO:FFS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)
TASTER_U to accu_in<3>.D 0.000 23.700 -23.700
TASTER_U to cnt<1>.D 0.000 23.700 -23.700
TASTER_U to cnt<2>.D 0.000 23.700 -23.700


Constraint: AUTO_TS_F2P

Description: MAXDELAY:FROM:FFS(*):TO:PADS(*):0.000 nS
Path Requirement (ns) Delay (ns) Slack (ns)
EN_DISP<0>.Q to A 0.000 23.900 -23.900
EN_DISP<0>.Q to B 0.000 23.900 -23.900
EN_DISP<0>.Q to C 0.000 23.900 -23.900



Number of constraints not met: 4

Data Sheet Report

Maximum External Clock Speeds

Clock fEXT (MHz) Reason
CLK_SLOW 24.510 Limited by Cycle Time for CLK_SLOW

Setup/Hold Times for Clocks

Setup/Hold Times for Clock CLK_SLOW
Source Pad Setup to clk (edge) Hold to clk (edge)
TASTER_R 14.200 0.000
TASTER_U 21.900 0.000


Clock to Pad Timing

Clock CLK_SLOW to Pad
Destination Pad Clock (edge) to Pad
A 25.700
B 25.700
C 25.700
D 25.700
E 25.700
F 25.700
G 25.700
LED<0> 10.300
LED<1> 10.300
EN_DISP<0> 5.800
EN_DISP<1> 5.800


Clock to Setup Times for Clocks

Clock to Setup for clock CLK_SLOW
Source Destination Delay
accu_in<0>.Q accu_out<6>.D 40.800
accu_in<0>.Q accu_out<7>.D 40.800
accu_in<1>.Q accu_out<6>.D 40.800
accu_in<1>.Q accu_out<7>.D 40.800
accu_out<0>.Q accu_out<6>.D 40.800
accu_out<0>.Q accu_out<7>.D 40.800
accu_out<1>.Q accu_out<6>.D 40.800
accu_out<1>.Q accu_out<7>.D 40.800
accu_in<0>.Q accu_out<5>.D 33.100
accu_in<1>.Q accu_out<5>.D 33.100
accu_in<2>.Q accu_out<6>.D 33.100
accu_in<2>.Q accu_out<7>.D 33.100
accu_in<3>.Q accu_out<6>.D 33.100
accu_in<3>.Q accu_out<7>.D 33.100
accu_in<4>.Q accu_out<6>.D 33.100
accu_in<4>.Q accu_out<7>.D 33.100
accu_out<0>.Q accu_out<5>.D 33.100
accu_out<1>.Q accu_out<5>.D 33.100
accu_out<2>.Q accu_out<6>.D 33.100
accu_out<2>.Q accu_out<7>.D 33.100
accu_out<3>.Q accu_out<6>.D 33.100
accu_out<3>.Q accu_out<7>.D 33.100
accu_out<4>.Q accu_out<6>.D 33.100
accu_out<4>.Q accu_out<7>.D 33.100
LED<0>.Q accu_in<3>.D 25.400
LED<0>.Q cnt<1>.D 25.400
LED<0>.Q cnt<2>.D 25.400
LED<0>.Q cnt<3>.D 25.400
LED<1>.Q accu_in<3>.D 25.400
LED<1>.Q cnt<1>.D 25.400
LED<1>.Q cnt<2>.D 25.400
LED<1>.Q cnt<3>.D 25.400
XLXN_204.Q accu_in<3>.D 25.400
XLXN_204.Q cnt<1>.D 25.400
XLXN_204.Q cnt<2>.D 25.400
XLXN_204.Q cnt<3>.D 25.400
accu_in<0>.Q accu_out<3>.D 25.400
accu_in<0>.Q accu_out<4>.D 25.400
accu_in<1>.Q accu_out<3>.D 25.400
accu_in<1>.Q accu_out<4>.D 25.400
accu_in<2>.Q accu_out<5>.D 25.400
accu_in<3>.Q accu_out<5>.D 25.400
accu_in<4>.Q accu_out<5>.D 25.400
accu_out<0>.Q accu_out<3>.D 25.400
accu_out<0>.Q accu_out<4>.D 25.400
accu_out<1>.Q accu_out<3>.D 25.400
accu_out<1>.Q accu_out<4>.D 25.400
accu_out<2>.Q accu_out<5>.D 25.400
accu_out<3>.Q accu_out<5>.D 25.400
accu_out<4>.Q accu_out<5>.D 25.400
LED<0>.Q accu_in<0>.D 17.700
LED<0>.Q accu_in<1>.D 17.700
LED<0>.Q accu_in<2>.D 17.700
LED<0>.Q cnt<0>.D 17.700
LED<1>.Q LED<0>.D 17.700
LED<1>.Q accu_in<0>.D 17.700
LED<1>.Q accu_in<1>.D 17.700
LED<1>.Q accu_in<2>.D 17.700
LED<1>.Q accu_out<0>.CE 17.700
LED<1>.Q accu_out<1>.CE 17.700
LED<1>.Q accu_out<2>.CE 17.700
LED<1>.Q accu_out<3>.CE 17.700
LED<1>.Q accu_out<4>.CE 17.700
LED<1>.Q accu_out<5>.CE 17.700
LED<1>.Q accu_out<6>.CE 17.700
LED<1>.Q accu_out<7>.CE 17.700
LED<1>.Q cnt<0>.D 17.700
XLXN_163.Q LED<0>.D 17.700
XLXN_163.Q accu_in<0>.D 17.700
XLXN_163.Q accu_in<1>.D 17.700
XLXN_163.Q accu_in<2>.D 17.700
XLXN_163.Q accu_in<3>.D 17.700
XLXN_163.Q accu_out<0>.CE 17.700
XLXN_163.Q accu_out<1>.CE 17.700
XLXN_163.Q accu_out<2>.CE 17.700
XLXN_163.Q accu_out<3>.CE 17.700
XLXN_163.Q accu_out<4>.CE 17.700
XLXN_163.Q accu_out<5>.CE 17.700
XLXN_163.Q accu_out<6>.CE 17.700
XLXN_163.Q accu_out<7>.CE 17.700
XLXN_163.Q cnt<0>.D 17.700
XLXN_163.Q cnt<1>.D 17.700
XLXN_163.Q cnt<2>.D 17.700
XLXN_163.Q cnt<3>.D 17.700
XLXN_204.Q accu_in<0>.D 17.700
XLXN_204.Q accu_in<1>.D 17.700
XLXN_204.Q accu_in<2>.D 17.700
XLXN_204.Q cnt<0>.D 17.700
accu_in<0>.Q accu_in<3>.D 17.700
accu_in<0>.Q accu_out<2>.D 17.700
accu_in<1>.Q accu_in<3>.D 17.700
accu_in<1>.Q accu_out<2>.D 17.700
accu_in<2>.Q accu_in<3>.D 17.700
accu_in<2>.Q accu_out<3>.D 17.700
accu_in<2>.Q accu_out<4>.D 17.700
accu_in<3>.Q accu_out<3>.D 17.700
accu_in<3>.Q accu_out<4>.D 17.700
accu_in<4>.Q accu_out<4>.D 17.700
accu_in<5>.Q accu_out<6>.D 17.700
accu_in<5>.Q accu_out<7>.D 17.700
accu_in<7>.Q accu_out<7>.D 17.700
accu_out<0>.Q accu_out<2>.D 17.700
accu_out<1>.Q accu_out<2>.D 17.700
accu_out<2>.Q accu_out<3>.D 17.700
accu_out<2>.Q accu_out<4>.D 17.700
accu_out<3>.Q accu_out<3>.D 17.700
accu_out<3>.Q accu_out<4>.D 17.700
accu_out<4>.Q accu_out<4>.D 17.700
accu_out<5>.Q accu_out<6>.D 17.700
accu_out<5>.Q accu_out<7>.D 17.700
accu_out<7>.Q accu_out<7>.D 17.700
cnt<0>.Q cnt<1>.D 17.700
cnt<0>.Q cnt<2>.D 17.700
cnt<0>.Q cnt<3>.D 17.700
cnt<1>.Q cnt<1>.D 17.700
cnt<1>.Q cnt<2>.D 17.700
cnt<1>.Q cnt<3>.D 17.700
cnt<2>.Q cnt<3>.D 17.700
accu_in<6>.Q accu_out<7>.D 11.000
accu_out<6>.Q accu_out<7>.D 11.000
EN_DISP<0>.Q EN_DISP<1>.D 10.000
LED<0>.Q LED<1>.D 10.000
LED<1>.Q LED<1>.D 10.000
LED<1>.Q accu_in<4>.CE 10.000
LED<1>.Q accu_in<5>.CE 10.000
LED<1>.Q accu_in<6>.CE 10.000
LED<1>.Q accu_in<7>.CE 10.000
XLXN_163.Q LED<1>.D 10.000
XLXN_163.Q accu_in<4>.CE 10.000
XLXN_163.Q accu_in<5>.CE 10.000
XLXN_163.Q accu_in<6>.CE 10.000
XLXN_163.Q accu_in<7>.CE 10.000
accu_in<0>.Q accu_in<0>.D 10.000
accu_in<0>.Q accu_in<1>.D 10.000
accu_in<0>.Q accu_in<2>.D 10.000
accu_in<0>.Q accu_out<0>.D 10.000
accu_in<0>.Q accu_out<1>.D 10.000
accu_in<1>.Q accu_in<1>.D 10.000
accu_in<1>.Q accu_in<2>.D 10.000
accu_in<1>.Q accu_out<1>.D 10.000
accu_in<2>.Q accu_in<2>.D 10.000
accu_in<2>.Q accu_out<2>.D 10.000
accu_in<3>.Q accu_in<3>.D 10.000
accu_in<3>.Q accu_in<4>.D 10.000
accu_in<4>.Q accu_in<5>.D 10.000
accu_in<5>.Q accu_in<6>.D 10.000
accu_in<5>.Q accu_out<5>.D 10.000
accu_in<6>.Q accu_in<7>.D 10.000
accu_in<6>.Q accu_out<6>.D 10.000
accu_out<0>.Q accu_out<1>.D 10.000
accu_out<1>.Q accu_out<1>.D 10.000
cnt<0>.Q accu_out<0>.CE 10.000
cnt<0>.Q accu_out<1>.CE 10.000
cnt<0>.Q accu_out<2>.CE 10.000
cnt<0>.Q accu_out<3>.CE 10.000
cnt<0>.Q accu_out<4>.CE 10.000
cnt<0>.Q accu_out<5>.CE 10.000
cnt<0>.Q accu_out<6>.CE 10.000
cnt<0>.Q accu_out<7>.CE 10.000
cnt<0>.Q cnt<0>.D 10.000
cnt<1>.Q cnt<0>.D 10.000
cnt<2>.Q cnt<1>.D 10.000
cnt<2>.Q cnt<2>.D 10.000
cnt<3>.Q cnt<2>.D 10.000
cnt<3>.Q cnt<3>.D 10.000


Pad to Pad List

Source Pad Destination Pad Delay



Number of paths analyzed: 339
Number of Timing errors: 339
Analysis Completed: Wed Apr 08 15:38:16 2009